HiPEAC Paper Award for the publication of "MeRLiN: Exploiting Dynamic
Instruction Behavior for Fast and Accurate Microarchitecture Level Reliability
Assessment " in ISCA-44, 2017
Senior Member status (IEEE), 2016
Best Paper Nominee for the paper "iRMW: A Low-Cost Technique to Reduce
NBTI-Dependent Parametric Failures in L1 Caches" in ICCD-32, 2014.
Recognition for Excellence in Education (2008-2012, evaluation every 5
years). Mèrits de docència d'especial qualitat (quinqueni 2008-2012).
UPC and AQU Catalunya, 2013
Best Paper Award for the paper "Mitigation strategies of the variability
in 3T1D cell memories scaled beyond 22nm" in DCIS 2012.
Recognition for Excellence in Education (2003-2007, evaluation every 5
years). Mèrits de docència d'especial qualitat (quinqueni 2003-2007).
UPC and AQU Catalunya, 2010
HiPEAC Paper Award for the publication of "An hybrid eDRAM/SRAM
macrocell to implement first-level data caches" in MICRO-42, 2010
First price in the 6th Duran Farell Award on technology and research in
Spain, UPC and Gas Natural, member of the research team of the project:
"Efficient processor design through clustering". (UPC
Informacions Magazine pp.10), 2008
Certificate of Appreciation in recognition of the inclusion of
“Replacing 6T SRAMs with 3T1D DRAMs in the L1 Data Cache to Combat Process
Variability” in the Jan/Feb 2008 IEEE Micro Top Picks Special Issue on the
most industry relevant and significant papers of 2007 in Computer
Architecture. (certificate), 2008
Fulbright Award, Comission for Cultural Educational and Scientific
Exchange between the United States of America and Spain and the Generalitat
de Catalunya, 2006 (certificate).